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io2313.h

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00001 /*            - io2313.h -
00002 
00003    This file #defines the internal register addresses for AT90S2313.
00004 */
00005 
00006 #ifndef __IO2313
00007 #define __IO2313 1
00008 
00009 
00010 /*==========================*/
00011 /* Predefined SFR Addresses */
00012 /*==========================*/
00013 
00014 /* Analog Comparator Control and Status Register */
00015 #define ACSR     0x08
00016 
00017 /* UART Baud Rate Register */
00018 #define UBRR     0x09
00019 
00020 /* UART Control Register */
00021 #define UCR     0x0A
00022 
00023 /* UART Status Register */
00024 #define USR     0x0B
00025 
00026 /* UART I/O Data Register */
00027 #define UDR     0x0C
00028 
00029 /* Input Pins, Port D */
00030 #define PIND     0x10
00031 
00032 /* Data Direction Register, Port D */
00033 #define DDRD     0x11
00034 
00035 /* Data Register, Port D */
00036 #define PORTD     0x12
00037 
00038 /* Input Pins, Port B */
00039 #define PINB     0x16
00040 
00041 /* Data Direction Register, Port B */
00042 #define DDRB     0x17
00043 
00044 /* Data Register, Port B */
00045 #define PORTB     0x18
00046 
00047 /* EEPROM Control Register */
00048 #define EECR     0x1C
00049 
00050 /* EEPROM Data Register */
00051 #define EEDR     0x1D
00052 
00053 /* EEPROM Address Register */
00054 #define EEARL    0x1E
00055 
00056 /* Watchdog Timer Control Register */
00057 #define WDTCR     0x21
00058 
00059 /* T/C 1 Input Capture Register */
00060 #define ICR1L     0x24
00061 #define ICR1H     0x25
00062 
00063 /* Output Compare Register 1 */
00064 #define OCR1L     0x2A
00065 #define OCR1H     0x2B
00066 
00067 /* Timer/Counter 1 */
00068 #define TCNT1L     0x2C
00069 #define TCNT1H     0x2D
00070 
00071 /* Timer/Counter 1 Control and Status Register */
00072 #define TCCR1B     0x2E
00073 
00074 /* Timer/Counter 1 Control Register */
00075 #define TCCR1A     0x2F
00076 
00077 /* Timer/Counter 0 */
00078 #define TCNT0     0x32
00079 
00080 /* Timer/Counter 0 Control Register */
00081 #define TCCR0     0x33
00082 
00083 /* MCU general Control Register */
00084 #define MCUCR     0x35
00085 
00086 /* Timer/Counter Interrupt Flag register */
00087 #define TIFR     0x38
00088 
00089 /* Timer/Counter Interrupt MaSK register */
00090 #define TIMSK     0x39
00091 
00092 /* General Interrupt Flag Register */
00093 #define GIFR  0x3A
00094 
00095 /* General Interrupt MaSK register */
00096 #define GIMSK     0x3B
00097 
00098 /* Stack Pointer */
00099 #define SPL        0x3D
00100 
00101 /* Status REGister */
00102 #define SREG     0x3F
00103 
00104 
00105 /*=============================*/
00106 /* Interrupt Vector Definitions */
00107 /*==============================*/
00108 
00109 /* NB! vectors are specified as byte addresses */
00110 
00111 #define    RESET_vect        (0x00)
00112 #define    INT0_vect        (0x02)
00113 #define    INT1_vect        (0x04)
00114 #define    TIMER1_CAPT_vect    (0x06)
00115 #define    TIMER1_COMPA_vect    (0x08)
00116 #define    TIMER1_OVF_vect    (0x0A)
00117 #define    TIMER0_OVF_vect    (0x0C)
00118 #define    UART_RX_vect        (0x0E)
00119 #define    UART_UDRE_vect        (0x10)
00120 #define    UART_TX_vect        (0x12)
00121 #define    ANA_COMP_vect        (0x14)
00122 
00123 #define INT_VECT_SIZE (0x16)
00124  
00125 /*
00126    The Register Bit names are represented by their bit number (0-7).
00127 */     
00128  
00129 /* General Interrupt MaSK register */
00130 #define    INT1    7
00131 #define    INT0    6
00132  
00133 /* General Interrupt Flag Register */
00134 #define    INTF1   7
00135 #define    INTF0   6
00136  
00137 /* Timer/Counter Interrupt MaSK register */                 
00138 #define    TOIE1   7
00139 #define    OCIE1A  6
00140 #define    TICIE   3
00141 #define    TOIE0   1
00142  
00143 /* Timer/Counter Interrupt Flag register */                   
00144 #define    TOV1    7
00145 #define    OCF1A   6
00146 #define    ICF1    3
00147 #define    TOV0    1
00148  
00149 /* MCU general Control Register */ 
00150 #define    SE      5
00151 #define    SM      4
00152 #define    ISC11   3
00153 #define    ISC10   2
00154 #define    ISC01   1
00155 #define    ISC00   0
00156  
00157 /* Timer/Counter 0 Control Register */
00158 #define    CS02    2
00159 #define    CS01    1
00160 #define    CS00    0
00161  
00162 /* Timer/Counter 1 Control Register */
00163 #define    COM1A1  7
00164 #define    COM1A0  6
00165 #define    PWM11   1
00166 #define    PWM10   0
00167  
00168 /* Timer/Counter 1 Control and Status Register */
00169 #define    ICNC1   7
00170 #define    ICES1   6
00171 #define    CTC1    3
00172 #define    CS12    2
00173 #define    CS11    1
00174 #define    CS10    0
00175                         
00176 /* Watchdog Timer Control Register */
00177 #define    WDTOE   4
00178 #define    WDE     3
00179 #define    WDP2    2
00180 #define    WDP1    1
00181 #define    WDP0    0
00182  
00183 /* EEPROM Control Register */
00184 #define    EEMWE   2
00185 #define    EEWE    1
00186 #define    EERE    0
00187  
00188 /* Data Register, Port B */  
00189 #define    PB7     7
00190 #define    PB6     6
00191 #define    PB5     5
00192 #define    PB4     4
00193 #define    PB3     3
00194 #define    PB2     2
00195 #define    PB1     1
00196 #define    PB0     0
00197  
00198 /* Data Direction Register, Port B */
00199 #define    DDB7    7
00200 #define    DDB6    6
00201 #define    DDB5    5
00202 #define    DDB4    4
00203 #define    DDB3    3
00204 #define    DDB2    2
00205 #define    DDB1    1
00206 #define    DDB0    0
00207  
00208 /* Input Pins, Port B */
00209 #define    PINB7   7
00210 #define    PINB6   6
00211 #define    PINB5   5
00212 #define    PINB4   4
00213 #define    PINB3   3
00214 #define    PINB2   2
00215 #define    PINB1   1
00216 #define    PINB0   0
00217  
00218 /* Data Register, Port D */
00219 #define    PD6     6
00220 #define    PD5     5
00221 #define    PD4     4
00222 #define    PD3     3
00223 #define    PD2     2
00224 #define    PD1     1
00225 #define    PD0     0
00226  
00227 /* Data Direction Register, Port D */
00228 #define    DDD6    6
00229 #define    DDD5    5
00230 #define    DDD4    4
00231 #define    DDD3    3
00232 #define    DDD2    2
00233 #define    DDD1    1
00234 #define    DDD0    0
00235  
00236 /* Input Pins, Port D */
00237 #define    PIND6   6
00238 #define    PIND5   5
00239 #define    PIND4   4
00240 #define    PIND3   3
00241 #define    PIND2   2
00242 #define    PIND1   1
00243 #define    PIND0   0
00244  
00245 /* UART Status Register */
00246 #define    RXC     7
00247 #define    TXC     6
00248 #define    UDRE    5
00249 #define    FE      4
00250 #define    OVR     3    /*This definition differs from the databook    */
00251                         /*definition to avoid problems with the OR instruction */
00252  
00253 /* UART Control Register */
00254 #define    RXCIE   7
00255 #define    TXCIE   6
00256 #define    UDRIE   5
00257 #define    RXEN    4
00258 #define    TXEN    3
00259 #define    CHR9    2
00260 #define    RXB8    1
00261 #define    TXB8    0
00262        
00263 /* Analog Comparator Control and Status Register */ 
00264 #define    ACD     7
00265 #define    ACO     5
00266 #define    ACI     4
00267 #define    ACIE    3
00268 #define    ACIC    2
00269 #define    ACIS1   1
00270 #define    ACIS0   0
00271        
00272 /* Pointer definition   */ 
00273 #define    XL     r26
00274 #define    XH     r27
00275 #define    YL     r28
00276 #define    YH     r29
00277 #define    ZL     r30
00278 #define    ZH     r31
00279        
00280 /* Constants */ 
00281 #define    RAMEND    0xDF
00282 #define    XRAMEND   0xDF
00283 #define    E2END     0x7F
00284 #define    FLASHEND  0x07FF
00285 
00286 #endif

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